/* PM utility functions */
int arm_validate_power_state(unsigned int power_state,
psci_power_state_t *req_state);
+int arm_validate_ns_entrypoint(uintptr_t entrypoint);
/* Topology utility function */
int arm_check_mpidr(u_register_t mpidr);
.pwr_domain_suspend_finish = fvp_pwr_domain_suspend_finish,
.system_off = fvp_system_off,
.system_reset = fvp_system_reset,
- .validate_power_state = arm_validate_power_state
+ .validate_power_state = arm_validate_power_state,
+ .validate_ns_entrypoint = arm_validate_ns_entrypoint
};
/*******************************************************************************
*/
#include <arch_helpers.h>
+#include <arm_def.h>
#include <assert.h>
#include <errno.h>
#include <plat_arm.h>
return PSCI_E_SUCCESS;
}
#endif /* __ARM_RECOM_STATE_ID_ENC__ */
+
+/*******************************************************************************
+ * ARM standard platform handler called to check the validity of the non secure
+ * entrypoint.
+ ******************************************************************************/
+int arm_validate_ns_entrypoint(uintptr_t entrypoint)
+{
+ /*
+ * Check if the non secure entrypoint lies within the non
+ * secure DRAM.
+ */
+ if ((entrypoint >= ARM_NS_DRAM1_BASE) && (entrypoint <
+ (ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE)))
+ return PSCI_E_SUCCESS;
+ if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint <
+ (ARM_DRAM2_BASE + ARM_DRAM2_SIZE)))
+ return PSCI_E_SUCCESS;
+
+ return PSCI_E_INVALID_ADDRESS;
+}
.pwr_domain_suspend_finish = css_pwr_domain_suspend_finish,
.system_off = css_system_off,
.system_reset = css_system_reset,
- .validate_power_state = arm_validate_power_state
+ .validate_power_state = arm_validate_power_state,
+ .validate_ns_entrypoint = arm_validate_ns_entrypoint
};
/*******************************************************************************